The present invention relates generally to defect detection in semiconductor device manufacturing, and, more particularly, to a wiring test structure for determining open and short circuits in semiconductor devices.
Wiring test structures are typically formed within kerf (peripheral) regions of semiconductor wafers in order to identify various electrical defects (e.g., opens and shorts) that may be indicative of processing problems. Such test structures should preferably facilitate maximizing the efficiency of detection for shorts and opens by allowing for as many tests as necessary, using a minimal amount of area, while still detecting all defects of concern with minimal “escapes” (i.e., missed defects). Moreover, such a structure preferably allows for implementing both open and short testing at the same time if possible and, in addition, for alternating phase shift mask applications (ALT-PSM) for very fine geometries.
Certain test structures in existence, such as comb structures for example, are configured to detect short circuits, but not open circuits. Furthermore, some shorts actually present within a comb structure may escape detection given the presence of other defects such as opens. Conversely, certain other test structures, such as serpentine test structures for example, are configured to detect opens but not shorts. Where shorts are present within a serpentine test structure, opens within the structure may escape detection.
Accordingly, it would be desirable for test structure to be able to detect the presence of either an open or a short with no or virtually no “escapes” due to various patterns of defects or combinations of defects. A test structure that is free of opens and shorts makes the structure authenticable by an electronic open and shorts test prior to its use for parametric testing (e.g., line resistance, capacitance). In addition, a test structure that is configured to allow for very few escapes of opens and shorts allows the structure to be a more useful process monitor, since a parametric measurement is less likely to be affected by a defect as the defects themselves would be detected with high confidence. It would further be desirable if such a structure could be configured in a manner consistent with ALT-PSM use.